Michael Spear, PhD Candidate, University of Rochester

"RingSTM: High Performance Software Transactional Memory"

Thursday, February 5, 4:00 PM

Packard Lab room 466

Reception prior to talk in Packard Lobby

Abstract:  Mainstream programmers typically use explicit locks to write parallel programs. The resulting code is prone to deadlock, and still often fails to perform well. Transactional Memory (TM) is a promising alternative to lock-based critical sections, in which the programmer specifies regions of code that require atomicity, and a run-time system executes those regions safely while exploiting available parallelism.

In order to succeed as a general-purpose mechanism, TM must perform well even for pathological workloads, and must interact correctly with other language features.  In this talk I describe RingSTM, a scalable, low latency software TM algorithm that provides strong progress guarantees.  Evaluation shows performance on par with other software TM algorithms for a wide variety of workloads.  RingSTM also offers promising opportunities for hardware acceleration, increasing the likelihood that TM will achieve widespread use.

Bio: Michael Spear is a PhD Candidate in the Department of Computer Science at the University of Rochester.  He received his MS in Computer Science from the University of Rochester in 2005, an MBA from the University of Alaska, Anchorage, in 2003, and his BS degree in Computer Science from the United States Military Academy in 1999.  His research interests are in the area of parallel systems, with an emphasis on the design and implementation of algorithms, run-time systems, and hardware features to increase the efficiency of shared memory synchronization. He is currently investigating a wide range of issues related to the implementation of efficient transactional memory, including algorithms, language-level semantics, operating system interaction, compiler optimizations, and cache coherence protocols.