Automated Strain Analysis Using Moire Interferometry

The explosive growth in the microelectronics industry has resulted in ever smaller silicon chips, which are packaged, or enclosed, in a plastic environment. During operation of the microelectronic device, the chip is subjected to a temperature variation. Over a long period of operation, the thermal stresses induced in the chip may lead to its fracture and, in turn, to failure of the entire device. Theoretical analysis of this problem is difficult because one does not know the material properties in presence of temperature variations. We therefore developed a new technique called digital image analysis enhanced Moire interferometry (DIAEMI). It measures the temperature-induced stresses in the chip and in other elements of the microelectronic package.

The accomplishments of my research group have been recognized in a number of ways. We have had visits from industrial concerns, such as Intel, Motorola, and IBM. I presented the work of my students by giving seminars at various universities and an invited lecture at a meeting of the Society of Experimental Mechanics. Our Department is a focal point for Experimental Mechanics, for which I am an Associate Editor. I have served on review panels for government agencies, such as NSF, and have been asked to serve as a consultant for Intel and Motorola.

A molded plastic package (schematically shown below) consists of a number of elements (die, wire, lead frame, etc.), each having different temperature-dependent material properties. We are using the DIAEMI technique to analyze the temperature-induced stresses in the package. Also shown is an example of Moire pattern; by analyzing it, one can determine the stress state. This information is important for design modification, which leads to a higher reliability of the package.

This project has led to contact with the Semiconductor Research Consortium, which involves groups at General Motors, National Semiconductor, Motorola, and IBM. Representatives from these concerns have visited our laboratory. In addition, we have visiting scientists from other countries who are involved in our research for a period of a half year to a year. These visitors have, of course, an influence on the development of our graduate students by providing different perspectives on how to approach open-ended research situations.

Professor Arkady Voloshin 

Schematic of a molded plastic package, made up of a chip surrounded by bond wires, a lead frame, and a molding compound (left schematic). A typical pattern of the stresses in the chip obtained using digital image analysis enhanced Moíre interferometry is shown below the schematic.

When I came to Lehigh, I explored the possibilities for research in the area of solid mechanics, and after Professor Voloshin showed me his work on stress measurement in silicon chips, I decided that I would like to become involved in those experiments. Participation in this project has led to interaction with not only industrial concerns, but also researchers at other universities. Recently I received a communication from Professor John Huntley of the University of Cambridge in England. He is interested in an automatic algorithm for fringe analysis, and it was exciting for me to present our experimental approaches and results to him for comparison. Communicating our results to those outside the university is a priority and I am currently preparing a publication to be presented at a national meeting of the Society of Experimental Mechanics.

I enjoy the open access to our faculty, which speeds along the progress in my research. For example, I meet with Professor Voloshin several times a week and can come to him whenever I am at an important juncture of my research or need to resolve a complicated issue.

Marco Cavaco, Ph.D. Candidate